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description: https://www.anuragkhandelwal.com/papers/mind.pdf
---

# MIND: In-Network Memory Management for Disaggregated Data Centers

* Resource disaggregation&#x20;
  * High resource utilization, ease to manage, elastic scalability&#x20;
  * Memory disaggregation&#x20;
    * Need for memory disaggregation
      * Now: suffer from low utilization, unbalanced usage, energy consumption&#x20;
      * Timely problem (storage disaggregation is already popular)
    * Goal:&#x20;
      * Performance (CPU <--> memory): high throughput and low latency
      * Transparent elasticity: flexible resource allocation&#x20;
    * Existing approach&#x20;
      * Distributed shared memory (DSM)&#x20;
        * Good elasticity but not good performance&#x20;
      * Recent disaggregated memory schemes&#x20;
        * Compromise elasticity by high throughput (no sharing0&#x20;
      * Key insight: in-network memory management (MMU)&#x20;
        * Central location: global view & processing directly in the data path&#x20;
        * Programmable switching ASIC: flexible processing at line rate&#x20;
        * Similarity between network functions and memory management&#x20;
          * ![](https://2097630930-files.gitbook.io/~/files/v0/b/gitbook-x-prod.appspot.com/o/spaces%2F-MVORxAomcgtzVVUqmws%2Fuploads%2FPcaLQvFIZHDZDhzIgp0f%2Fimage.png?alt=media\&token=3f4b95df-7823-4ef7-9cf9-35f7b56756c5)
    * MIND: in-network memory management&#x20;
      * ![](https://2097630930-files.gitbook.io/~/files/v0/b/gitbook-x-prod.appspot.com/o/spaces%2F-MVORxAomcgtzVVUqmws%2Fuploads%2FoYErqsWUpF9hU7AsfsHR%2Fimage.png?alt=media\&token=186f56db-744e-431b-9911-0a68728700e8)
        * Address translation: where is the data
        * Memory protection: is this access permitted or valid?
        * Cache coherence protocol: how to keep data synchronized?&#x20;
    * Challenges in Building In-network MMU
      * Limited amount of in-network resources&#x20;
        * Limited size of in-network memory&#x20;
          * Tens of MB --> not sufficient to store metadata in a traditional way&#x20;
        * Limited computation capability&#x20;
          * Switching ASIC --> not sufficient to directly port traditional MMU functions&#x20;
    * **3 Principles for System Design**&#x20;
      * **P1: decouple memory management functionalities**&#x20;
        * Each function has the data structure suitable to its purpose&#x20;
      * **P2: Leverage global view of network**&#x20;
        * Make better decisions for memory management&#x20;
      * **P3: Exploit network-centric hardware primitives**
        * Reuse network hardware highly optimized for network functions&#x20;
    * Challenges&#x20;
      * Address translation&#x20;
        * Small: too many entries, huge page: load balancing&#x20;
        * Apply
          * Static huge partition&#x20;
          * Fine-grained, range-based translation&#x20;
      * Memory protection&#x20;
        * Small: too many entries, huge page: inflexible protection&#x20;
        * Solve: VMA-granularity protection&#x20;
      * Cache directory&#x20;
        * Small cache line: too many entries, large cache line: false sharing &#x20;
        * Solve: access granularity, coherence granularity (dynamic resizing), with theoretical bound of O(log2)&#x20;
* Performance evaluation&#x20;
  * Low contention, high contention&#x20;
* Conclusion
  * Trade-off between resource elasticity and performance in memory aggregation&#x20;
  * MIND: in-network MMU by leveraging programmable network&#x20;
  * Match the performance of prior proposals and provide transparent elasticity&#x20;
