# Chips and Compilers Symposium

![](https://2097630930-files.gitbook.io/~/files/v0/b/gitbook-legacy-files/o/assets%2F-MVORxAomcgtzVVUqmws%2F-MXXUdyI04POY4p8Uh3f%2F-MXXZT9SRfFNiywYOz3Q%2Fimage.png?alt=media\&token=161c2767-08ba-47e4-bd77-24e7c9586484)

![](https://2097630930-files.gitbook.io/~/files/v0/b/gitbook-legacy-files/o/assets%2F-MVORxAomcgtzVVUqmws%2F-MXXUdyI04POY4p8Uh3f%2F-MXXZlox71aGpkOlCso5%2Fimage.png?alt=media\&token=e24dbc92-dbb9-4644-bedb-498c67c21793)

* Frameworks: front-end
* Compilers: back-end 

### Focus 

#### Compilers 

* Sparse Computation
* Circuit IR Compilers 
* MLIR
* PyTorch
* TVM 
* Alibaba Compilers 

#### Chips 

* Nvidia 
* Google TPU 
* Arm MicroNPU 

#### Panel Discussion

* Lessons learned and future directions for co-design for chips and compilers