HeMem: Scalable Tiered Memory Management for Big Data Applications and Real NVM
Presentation
DRAM + NVM tiered memory
NVM: 8x capacity, 2x latency, assymetric read/write bandwidth, high overhead for small accesses
Hardware tiered memory
Example: Intel Optane Memory mode
no OS support needed
low overhead
no visibility into apps
limited to simple management techniques
Software tiered memory
Insights into applications, support complex policies
But
Does not scale to NVM capacity (due to page table overheads)
No support for asymmetric read / write bandwidth
Limited flexibility
HeMem design principles
Asynchronous memory access sampling with CPU performance counters
PEBS memory access sampling
Asynchronous memory migration with DMA offload
Hot/code classification
Mark the pages as WP
DMA copy memory in the background
Data scalability awareness
Focus on asymmetric NVM bandwidth
Flexibility
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