# HeMem: Scalable Tiered Memory Management for Big Data Applications and Real NVM

### Presentation&#x20;

* DRAM + NVM tiered memory&#x20;
  * NVM: 8x capacity, 2x latency, assymetric read/write bandwidth, high overhead for small accesses&#x20;
* Hardware tiered memory&#x20;
  * Example: Intel Optane Memory mode
    * no OS support needed
    * low overhead
    * no visibility into apps
    * limited to simple management techniques&#x20;
* Software tiered memory&#x20;
  * Insights into applications, support complex policies&#x20;
  * But
    * Does not scale to NVM capacity (due to page table overheads)
    * No support for asymmetric read / write bandwidth&#x20;
    * Limited flexibility&#x20;
* HeMem design principles&#x20;
  * Asynchronous memory access sampling with CPU performance counters
    * PEBS memory access sampling&#x20;
  * Asynchronous memory migration with DMA offload&#x20;
    * Hot/code classification&#x20;
    * Mark the pages as WP&#x20;
    * DMA copy memory in the background&#x20;
  * Data scalability awareness&#x20;
  * Focus on asymmetric NVM bandwidth
  * Flexibility&#x20;
